forked from OERV-BSP/u-boot
include/configs: Whitespace fixup
A number of moveconfig.py runs have left a instances of multiple empty lines in a row. Correct this to a single empty line. Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -154,14 +154,12 @@
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#define CONFIG_DDR_SPD
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#define CONFIG_SYS_FSL_DDR3
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/*
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* IFC Definitions
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*/
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#define CONFIG_SYS_FLASH_BASE 0xe0000000
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#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
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#else
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@@ -349,7 +347,6 @@
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/* default location for tftp and bootm */
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#define CONFIG_LOADADDR 1000000
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_HVBOOT \
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@@ -572,7 +569,6 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_RAMBOOT
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#endif
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/* I2C */
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#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
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#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
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@@ -606,7 +602,6 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SF_DEFAULT_SPEED 10000000
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#define CONFIG_SF_DEFAULT_MODE 0
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/* Qman/Bman */
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#ifndef CONFIG_NOBQFMAN
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#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
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@@ -696,7 +691,6 @@ unsigned long get_board_ddr_clk(void);
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#define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR
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#endif
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/* SATA */
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LIBATA
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