forked from OERV-BSP/u-boot
Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
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@@ -1206,12 +1206,10 @@ static int zynq_nand_probe(struct udevice *dev)
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nand_chip->options |= NAND_SUBPAGE_READ;
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/* On-Die ECC spare bytes offset 8 is used for ECC codes */
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if (ondie_ecc_enabled) {
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nand_chip->ecc.layout = &ondie_nand_oob_64;
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/* Use the BBT pattern descriptors */
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nand_chip->bbt_td = &bbt_main_descr;
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nand_chip->bbt_md = &bbt_mirror_descr;
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}
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nand_chip->ecc.layout = &ondie_nand_oob_64;
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/* Use the BBT pattern descriptors */
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nand_chip->bbt_td = &bbt_main_descr;
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nand_chip->bbt_md = &bbt_mirror_descr;
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} else {
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/* Hardware ECC generates 3 bytes ECC code for each 512 bytes */
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nand_chip->ecc.mode = NAND_ECC_HW;
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