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dm: treewide: Rename ..._platdata variables to just ..._plat

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Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2020-12-03 16:55:23 -07:00
parent b012ff1f1b
commit 8a8d24bdf1
358 changed files with 1404 additions and 1411 deletions
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2
include/dm/platform_data/fsl_espi.h
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@@ -6,7 +6,7 @@
#ifndef __fsl_espi_h
#define __fsl_espi_h
struct fsl_espi_platdata {
struct fsl_espi_plat {
uint flags;
uint speed_hz;
uint num_chipselect;

4
include/dm/platform_data/lpc32xx_hsuart.h
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@@ -7,11 +7,11 @@
#define _LPC32XX_HSUART_PLAT_H
/**
* struct lpc32xx_hsuart_platdata - NXP LPC32xx HSUART platform data
* struct lpc32xx_hsuart_plat - NXP LPC32xx HSUART platform data
*
* @base: Base register address
*/
struct lpc32xx_hsuart_platdata {
struct lpc32xx_hsuart_plat {
unsigned long base;
};

2
include/dm/platform_data/pxa_mmc_gen.h
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@@ -9,7 +9,7 @@
#include <mmc.h>
/*
* struct pxa_mmc_platdata - information about a PXA MMC controller
* struct pxa_mmc_plat - information about a PXA MMC controller
*
* @base: MMC controller base register address
*/

2
include/dm/platform_data/serial_bcm283x_mu.h
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@@ -14,7 +14,7 @@
*
* @base: Register base address
*/
struct bcm283x_mu_serial_platdata {
struct bcm283x_mu_serial_plat {
unsigned long base;
unsigned int clock;
bool skip_init;

4
include/dm/platform_data/serial_coldfire.h
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@@ -7,13 +7,13 @@
#define __serial_coldfire_h
/*
* struct coldfire_serial_platdata - information about a coldfire port
* struct coldfire_serial_plat - information about a coldfire port
*
* @base: Uart port base register address
* @port: Uart port index, for cpu with pinmux for uart / gpio
* baudrtatre: Uart port baudrate
*/
struct coldfire_serial_platdata {
struct coldfire_serial_plat {
unsigned long base;
int port;
int baudrate;

2
include/dm/platform_data/serial_mxc.h
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@@ -7,7 +7,7 @@
#define __serial_mxc_h
/* Information about a serial port */
struct mxc_serial_platdata {
struct mxc_serial_plat {
struct mxc_uart *reg; /* address of registers in physical memory */
bool use_dte;
};

2
include/dm/platform_data/serial_pl01x.h
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@@ -20,7 +20,7 @@ enum pl01x_type {
* @skip_init: Don't attempt to change port configuration (also means @clock
* is ignored)
*/
struct pl01x_serial_platdata {
struct pl01x_serial_plat {
unsigned long base;
enum pl01x_type type;
unsigned int clock;

4
include/dm/platform_data/serial_pxa.h
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@@ -40,13 +40,13 @@
#endif
/*
* struct pxa_serial_platdata - information about a PXA port
* struct pxa_serial_plat - information about a PXA port
*
* @base: Uart port base register address
* @port: Uart port index, for cpu with pinmux for uart / gpio
* baudrtatre: Uart port baudrate
*/
struct pxa_serial_platdata {
struct pxa_serial_plat {
struct pxa_uart_regs *base;
int port;
int baudrate;

2
include/dm/platform_data/serial_sh.h
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@@ -27,7 +27,7 @@ enum sh_serial_type {
* @clk_mode: Clock mode, set internal (INT) or external (EXT)
* @type: Type of SCIF
*/
struct sh_serial_platdata {
struct sh_serial_plat {
unsigned long base;
unsigned int clk;
enum sh_clk_mode clk_mode;

4
include/dm/platform_data/spi_coldfire.h
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@@ -10,14 +10,14 @@
#define MAX_CTAR_FIELDS 8
/*
* struct coldfire_spi_platdata - information about a coldfire spi module
* struct coldfire_spi_plat - information about a coldfire spi module
*
* @regs_addr: base address for module registers
* @speed_hz: default SCK frequency
* @mode: default SPI mode
* @num_cs: number of DSPI chipselect signals
*/
struct coldfire_spi_platdata {
struct coldfire_spi_plat {
fdt_addr_t regs_addr;
uint speed_hz;
uint mode;

2
include/dm/platform_data/spi_davinci.h
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@@ -7,7 +7,7 @@
#ifndef __spi_davinci_h
#define __spi_davinci_h
struct davinci_spi_platdata {
struct davinci_spi_plat {
struct davinci_spi_regs *regs;
u8 num_cs; /* total no. of CS available */
};