forked from OERV-BSP/u-boot
Merge the new NAND code (testing-NAND brach); see doc/README.nand
Rewrite of NAND code based on what is in 2.6.12 Linux kernel Patch by Ladislav Michl, 29 Jun 2005 [Merge with /home/tur/nand/u-boot]
This commit is contained in:
16
drivers/nand/Makefile
Normal file
16
drivers/nand/Makefile
Normal file
@@ -0,0 +1,16 @@
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include $(TOPDIR)/config.mk
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LIB := libnand.a
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OBJS := nand.o nand_base.o nand_ids.o nand_ecc.o nand_bbt.o
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all: $(LIB)
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$(LIB): $(OBJS)
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$(AR) crv $@ $(OBJS)
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#########################################################################
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.depend: Makefile $(OBJS:.o=.c)
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$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
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sinclude .depend
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1788
drivers/nand/diskonchip.c
Normal file
1788
drivers/nand/diskonchip.c
Normal file
File diff suppressed because it is too large
Load Diff
77
drivers/nand/nand.c
Normal file
77
drivers/nand/nand.c
Normal file
@@ -0,0 +1,77 @@
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/*
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* (C) Copyright 2005
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* 2N Telekomunikace, a.s. <www.2n.cz>
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* Ladislav Michl <michl@2n.cz>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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||||
* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
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||||
* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#ifdef CFG_NAND_LEGACY
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#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
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#endif
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include <nand.h>
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#ifndef CFG_NAND_BASE_LIST
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#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
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#endif
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int nand_curr_device = -1;
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nand_info_t nand_info[CFG_MAX_NAND_DEVICE];
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static struct nand_chip nand_chip[CFG_MAX_NAND_DEVICE];
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static ulong base_address[CFG_MAX_NAND_DEVICE] = CFG_NAND_BASE_LIST;
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static const char default_nand_name[] = "nand";
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extern void board_nand_init(struct nand_chip *nand);
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static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand,
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ulong base_addr)
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{
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mtd->priv = nand;
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nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr;
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board_nand_init(nand);
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if (nand_scan(mtd, 1) == 0) {
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if (!mtd->name)
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mtd->name = (char *)default_nand_name;
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} else
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mtd->name = NULL;
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}
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void nand_init(void)
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{
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int i;
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unsigned int size = 0;
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for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) {
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nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]);
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size += nand_info[i].size;
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if (nand_curr_device == -1)
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nand_curr_device = i;
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}
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printf("%lu MiB\n", size / (1024 * 1024));
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}
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#endif
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2665
drivers/nand/nand_base.c
Normal file
2665
drivers/nand/nand_base.c
Normal file
File diff suppressed because it is too large
Load Diff
1056
drivers/nand/nand_bbt.c
Normal file
1056
drivers/nand/nand_bbt.c
Normal file
File diff suppressed because it is too large
Load Diff
248
drivers/nand/nand_ecc.c
Normal file
248
drivers/nand/nand_ecc.c
Normal file
@@ -0,0 +1,248 @@
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/*
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* This file contains an ECC algorithm from Toshiba that detects and
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* corrects 1 bit errors in a 256 byte block of data.
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*
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* drivers/mtd/nand/nand_ecc.c
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*
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* Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
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* Toshiba America Electronics Components, Inc.
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*
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* $Id: nand_ecc.c,v 1.14 2004/06/16 15:34:37 gleixner Exp $
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*
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* This file is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
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* Free Software Foundation; either version 2 or (at your option) any
|
||||
* later version.
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||||
*
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||||
* This file is distributed in the hope that it will be useful, but WITHOUT
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||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
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||||
* You should have received a copy of the GNU General Public License along
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* with this file; if not, write to the Free Software Foundation, Inc.,
|
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*
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* As a special exception, if other files instantiate templates or use
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* macros or inline functions from these files, or you compile these
|
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* files and link them with other works to produce a work based on these
|
||||
* files, these files do not by themselves cause the resulting work to be
|
||||
* covered by the GNU General Public License. However the source code for
|
||||
* these files must still be made available in accordance with section (3)
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||||
* of the GNU General Public License.
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||||
*
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* This exception does not invalidate any other reasons why a work based on
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* this file might be covered by the GNU General Public License.
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*/
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#include <common.h>
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#ifdef CFG_NAND_LEGACY
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#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
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#endif
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include<linux/mtd/mtd.h>
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/*
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* Pre-calculated 256-way 1 byte column parity
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*/
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static const u_char nand_ecc_precalc_table[] = {
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0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
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0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
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0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
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0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
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0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
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0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
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0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
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0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
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0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
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0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
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0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
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0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
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0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
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0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
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0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
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0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
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};
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/**
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* nand_trans_result - [GENERIC] create non-inverted ECC
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* @reg2: line parity reg 2
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* @reg3: line parity reg 3
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* @ecc_code: ecc
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*
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* Creates non-inverted ECC code from line parity
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*/
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static void nand_trans_result(u_char reg2, u_char reg3,
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u_char *ecc_code)
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{
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u_char a, b, i, tmp1, tmp2;
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/* Initialize variables */
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a = b = 0x80;
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tmp1 = tmp2 = 0;
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/* Calculate first ECC byte */
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for (i = 0; i < 4; i++) {
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if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
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tmp1 |= b;
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b >>= 1;
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if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
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tmp1 |= b;
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b >>= 1;
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a >>= 1;
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}
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/* Calculate second ECC byte */
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b = 0x80;
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for (i = 0; i < 4; i++) {
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if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
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tmp2 |= b;
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b >>= 1;
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if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
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tmp2 |= b;
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b >>= 1;
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a >>= 1;
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}
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/* Store two of the ECC bytes */
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ecc_code[0] = tmp1;
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ecc_code[1] = tmp2;
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}
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/**
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* nand_calculate_ecc - [NAND Interface] Calculate 3 byte ECC code for 256 byte block
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* @mtd: MTD block structure
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* @dat: raw data
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* @ecc_code: buffer for ECC
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*/
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int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
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{
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u_char idx, reg1, reg2, reg3;
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int j;
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/* Initialize variables */
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reg1 = reg2 = reg3 = 0;
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ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
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|
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/* Build up column parity */
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for(j = 0; j < 256; j++) {
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/* Get CP0 - CP5 from table */
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idx = nand_ecc_precalc_table[dat[j]];
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reg1 ^= (idx & 0x3f);
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/* All bit XOR = 1 ? */
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if (idx & 0x40) {
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reg3 ^= (u_char) j;
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reg2 ^= ~((u_char) j);
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}
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}
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|
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/* Create non-inverted ECC code from line parity */
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nand_trans_result(reg2, reg3, ecc_code);
|
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|
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/* Calculate final ECC code */
|
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ecc_code[0] = ~ecc_code[0];
|
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ecc_code[1] = ~ecc_code[1];
|
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ecc_code[2] = ((~reg1) << 2) | 0x03;
|
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return 0;
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||||
}
|
||||
|
||||
/**
|
||||
* nand_correct_data - [NAND Interface] Detect and correct bit error(s)
|
||||
* @mtd: MTD block structure
|
||||
* @dat: raw data read from the chip
|
||||
* @read_ecc: ECC from the chip
|
||||
* @calc_ecc: the ECC calculated from raw data
|
||||
*
|
||||
* Detect and correct a 1 bit error for 256 byte block
|
||||
*/
|
||||
int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
|
||||
{
|
||||
u_char a, b, c, d1, d2, d3, add, bit, i;
|
||||
|
||||
/* Do error detection */
|
||||
d1 = calc_ecc[0] ^ read_ecc[0];
|
||||
d2 = calc_ecc[1] ^ read_ecc[1];
|
||||
d3 = calc_ecc[2] ^ read_ecc[2];
|
||||
|
||||
if ((d1 | d2 | d3) == 0) {
|
||||
/* No errors */
|
||||
return 0;
|
||||
}
|
||||
else {
|
||||
a = (d1 ^ (d1 >> 1)) & 0x55;
|
||||
b = (d2 ^ (d2 >> 1)) & 0x55;
|
||||
c = (d3 ^ (d3 >> 1)) & 0x54;
|
||||
|
||||
/* Found and will correct single bit error in the data */
|
||||
if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
|
||||
c = 0x80;
|
||||
add = 0;
|
||||
a = 0x80;
|
||||
for (i=0; i<4; i++) {
|
||||
if (d1 & c)
|
||||
add |= a;
|
||||
c >>= 2;
|
||||
a >>= 1;
|
||||
}
|
||||
c = 0x80;
|
||||
for (i=0; i<4; i++) {
|
||||
if (d2 & c)
|
||||
add |= a;
|
||||
c >>= 2;
|
||||
a >>= 1;
|
||||
}
|
||||
bit = 0;
|
||||
b = 0x04;
|
||||
c = 0x80;
|
||||
for (i=0; i<3; i++) {
|
||||
if (d3 & c)
|
||||
bit |= b;
|
||||
c >>= 2;
|
||||
b >>= 1;
|
||||
}
|
||||
b = 0x01;
|
||||
a = dat[add];
|
||||
a ^= (b << bit);
|
||||
dat[add] = a;
|
||||
return 1;
|
||||
} else {
|
||||
i = 0;
|
||||
while (d1) {
|
||||
if (d1 & 0x01)
|
||||
++i;
|
||||
d1 >>= 1;
|
||||
}
|
||||
while (d2) {
|
||||
if (d2 & 0x01)
|
||||
++i;
|
||||
d2 >>= 1;
|
||||
}
|
||||
while (d3) {
|
||||
if (d3 & 0x01)
|
||||
++i;
|
||||
d3 >>= 1;
|
||||
}
|
||||
if (i == 1) {
|
||||
/* ECC Code Error Correction */
|
||||
read_ecc[0] = calc_ecc[0];
|
||||
read_ecc[1] = calc_ecc[1];
|
||||
read_ecc[2] = calc_ecc[2];
|
||||
return 2;
|
||||
}
|
||||
else {
|
||||
/* Uncorrectable Error */
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Should never happen */
|
||||
return -1;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
|
||||
132
drivers/nand/nand_ids.c
Normal file
132
drivers/nand/nand_ids.c
Normal file
@@ -0,0 +1,132 @@
|
||||
/*
|
||||
* drivers/mtd/nandids.c
|
||||
*
|
||||
* Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
|
||||
*
|
||||
* $Id: nand_ids.c,v 1.10 2004/05/26 13:40:12 gleixner Exp $
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#ifdef CFG_NAND_LEGACY
|
||||
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
|
||||
#endif
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
|
||||
/*
|
||||
* Chip ID list
|
||||
*
|
||||
* Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
|
||||
* options
|
||||
*
|
||||
* Pagesize; 0, 256, 512
|
||||
* 0 get this information from the extended chip ID
|
||||
+ 256 256 Byte page size
|
||||
* 512 512 Byte page size
|
||||
*/
|
||||
struct nand_flash_dev nand_flash_ids[] = {
|
||||
{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
|
||||
{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
|
||||
{"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
|
||||
{"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
|
||||
{"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
|
||||
{"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
|
||||
{"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
|
||||
{"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
|
||||
{"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
|
||||
{"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
|
||||
|
||||
{"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
|
||||
{"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
|
||||
{"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
|
||||
{"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
|
||||
|
||||
{"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
|
||||
{"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
|
||||
{"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
|
||||
{"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
|
||||
|
||||
{"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
|
||||
{"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
|
||||
{"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
|
||||
{"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
|
||||
|
||||
{"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
|
||||
{"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
|
||||
{"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
|
||||
{"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
|
||||
|
||||
{"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
|
||||
{"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
|
||||
{"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
|
||||
{"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
|
||||
|
||||
{"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
|
||||
|
||||
{"NAND 512MiB 3,3V 8-bit", 0xDC, 512, 512, 0x4000, 0},
|
||||
|
||||
/* These are the new chips with large page size. The pagesize
|
||||
* and the erasesize is determined from the extended id bytes
|
||||
*/
|
||||
/* 1 Gigabit */
|
||||
{"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
{"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
|
||||
/* 2 Gigabit */
|
||||
{"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
{"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
|
||||
/* 4 Gigabit */
|
||||
{"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
{"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
|
||||
/* 8 Gigabit */
|
||||
{"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
{"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
|
||||
/* 16 Gigabit */
|
||||
{"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
|
||||
{"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
|
||||
|
||||
/* Renesas AND 1 Gigabit. Those chips do not support extended id and have a strange page/block layout !
|
||||
* The chosen minimum erasesize is 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page planes
|
||||
* 1 block = 2 pages, but due to plane arrangement the blocks 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7
|
||||
* Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go
|
||||
* There are more speed improvements for reads and writes possible, but not implemented now
|
||||
*/
|
||||
{"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY},
|
||||
|
||||
{NULL,}
|
||||
};
|
||||
|
||||
/*
|
||||
* Manufacturer ID list
|
||||
*/
|
||||
struct nand_manufacturers nand_manuf_ids[] = {
|
||||
{NAND_MFR_TOSHIBA, "Toshiba"},
|
||||
{NAND_MFR_SAMSUNG, "Samsung"},
|
||||
{NAND_MFR_FUJITSU, "Fujitsu"},
|
||||
{NAND_MFR_NATIONAL, "National"},
|
||||
{NAND_MFR_RENESAS, "Renesas"},
|
||||
{NAND_MFR_STMICRO, "ST Micro"},
|
||||
{0x0, "Unknown"}
|
||||
};
|
||||
#endif
|
||||
16
drivers/nand_legacy/Makefile
Normal file
16
drivers/nand_legacy/Makefile
Normal file
@@ -0,0 +1,16 @@
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB := libnand_legacy.a
|
||||
|
||||
OBJS := nand_legacy.o
|
||||
all: $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(AR) crv $@ $(OBJS)
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(OBJS:.o=.c)
|
||||
$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
|
||||
|
||||
sinclude .depend
|
||||
1615
drivers/nand_legacy/nand_legacy.c
Normal file
1615
drivers/nand_legacy/nand_legacy.c
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user