forked from OERV-BSP/u-boot
Merge the new NAND code (testing-NAND brach); see doc/README.nand
Rewrite of NAND code based on what is in 2.6.12 Linux kernel Patch by Ladislav Michl, 29 Jun 2005 [Merge with /home/tur/nand/u-boot]
This commit is contained in:
Wolfgang Denk
@@ -277,7 +277,7 @@ int board_early_init_f(void)
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}
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_legacy.h>
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extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
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/*----------------------------------------------------------------------------+
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@@ -32,3 +32,7 @@ endif
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ifeq ($(dbcr),1)
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PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
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endif
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# legacy nand support
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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@@ -30,3 +30,4 @@ TEXT_BASE = 0xFFF00000
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PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\
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-DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\
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-DTEXT_BASE=$(TEXT_BASE)
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@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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OBJS = $(BOARD).o flash.o nand.o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $^
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@@ -238,33 +238,6 @@ int testdram (void)
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/* ------------------------------------------------------------------------- */
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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extern ulong
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nand_probe(ulong physadr);
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void
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nand_init(void)
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{
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ulong totlen = 0;
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/*
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The HI model is equipped with a large block NAND chip not supported yet
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by U-Boot
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(CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
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*/
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#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME)
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debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
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totlen += nand_probe (CFG_NAND0_BASE);
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#endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
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debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
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totlen += nand_probe (CFG_NAND1_BASE);
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printf ("%3lu MB\n", totlen >>20);
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}
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#endif
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#ifdef CONFIG_CFB_CONSOLE
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# ifdef CONFIG_CONSOLE_EXTRA_INFO
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# include <video_fb.h>
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@@ -1,5 +1,5 @@
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#
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# (C) Copyright 2000
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# (C) Copyright 2000, 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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@@ -22,7 +22,14 @@
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#
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# Reserve 256 kB for Monitor
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TEXT_BASE = 0xFFFC0000
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#TEXT_BASE = 0xFFFC0000
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# Reserve 320 kB for Monitor
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#TEXT_BASE = 0xFFFB0000
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TEXT_BASE = 0xFFFB0000
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# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined)
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BOARDLIBS = drivers/nand/libnand.a
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
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#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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117
board/dave/PPChameleonEVB/nand.c
Normal file
117
board/dave/PPChameleonEVB/nand.c
Normal file
@@ -0,0 +1,117 @@
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/*
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* (C) Copyright 2006 DENX Software Engineering
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include <nand.h>
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/*
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* hardware specific access to control-lines
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* function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
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*/
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static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
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{
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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switch(cmd) {
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case NAND_CTL_SETCLE:
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MACRO_NAND_CTL_SETCLE((unsigned long)base);
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break;
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case NAND_CTL_CLRCLE:
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MACRO_NAND_CTL_CLRCLE((unsigned long)base);
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break;
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case NAND_CTL_SETALE:
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MACRO_NAND_CTL_SETALE((unsigned long)base);
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break;
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case NAND_CTL_CLRALE:
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MACRO_NAND_CTL_CLRALE((unsigned long)base);
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break;
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case NAND_CTL_SETNCE:
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MACRO_NAND_ENABLE_CE((unsigned long)base);
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break;
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case NAND_CTL_CLRNCE:
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MACRO_NAND_DISABLE_CE((unsigned long)base);
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break;
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}
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}
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/*
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* read device ready pin
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* function +/- borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
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*/
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static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
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{
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struct nand_chip *this = mtdinfo->priv;
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ulong rb_gpio_pin;
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/* use the base addr to find out which chip are we dealing with */
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switch((ulong) this->IO_ADDR_W) {
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case CFG_NAND0_BASE:
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rb_gpio_pin = CFG_NAND0_RDY;
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break;
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case CFG_NAND1_BASE:
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rb_gpio_pin = CFG_NAND1_RDY;
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break;
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default: /* this should never happen */
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return 0;
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break;
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}
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if (in32(GPIO0_IR) & rb_gpio_pin)
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return 1;
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return 0;
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}
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/*
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* Board-specific NAND initialization. The following members of the
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* argument are board-specific (per include/linux/mtd/nand.h):
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* - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
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* - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
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* - hwcontrol: hardwarespecific function for accesing control-lines
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* - dev_ready: hardwarespecific function for accesing device ready/busy line
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* - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
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* only be provided if a hardware ECC is available
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* - eccmode: mode of ecc, see defines
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* - chip_delay: chip dependent delay for transfering data from array to
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* read regs (tR)
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* - options: various chip options. They can partly be set to inform
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* nand_scan about special functionality. See the defines for further
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* explanation
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* Members with a "?" were not set in the merged testing-NAND branch,
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* so they are not set here either.
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*/
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void board_nand_init(struct nand_chip *nand)
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{
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nand->hwcontrol = ppchameleonevb_hwcontrol;
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nand->dev_ready = ppchameleonevb_device_ready;
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nand->eccmode = NAND_ECC_SOFT;
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nand->chip_delay = NAND_BIG_DELAY_US;
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nand->options = NAND_SAMSUNG_LP_OPTIONS;
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}
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#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
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@@ -239,7 +239,7 @@ int testdram (void)
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/* ------------------------------------------------------------------------- */
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_legacy.h>
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extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
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void nand_init(void)
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@@ -26,3 +26,6 @@
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#
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TEXT_BASE = 0xFFFC0000
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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@@ -238,7 +238,7 @@ U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
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/* ------------------------------------------------------------------------- */
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_legacy.h>
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extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
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void nand_init(void)
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@@ -26,3 +26,6 @@
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#
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TEXT_BASE = 0xFFFC0000
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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@@ -23,10 +23,15 @@
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*/
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#include <common.h>
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#ifndef CFG_NAND_LEGACY
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#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
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#endif
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#include <command.h>
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#include <image.h>
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#include <asm/byteorder.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_legacy.h>
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#include <fat.h>
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#include "auto_update.h"
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@@ -37,6 +42,9 @@
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#error "must define CFG_CMD_FAT"
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#endif
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extern au_image_t au_image[];
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extern int N_AU_IMAGES;
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@@ -76,9 +84,9 @@ extern block_dev_desc_t *get_dev (char*, int);
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#define NANDRW_JFFS2 0x02
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#define NANDRW_JFFS2_SKIP 0x04
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extern struct nand_chip nand_dev_desc[];
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extern int nand_rw(struct nand_chip* nand, int cmd, size_t start, size_t len,
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extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len,
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size_t * retlen, u_char * buf);
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extern int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
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extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
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#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
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extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
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@@ -259,9 +267,9 @@ int au_do_update(int i, long sz)
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} else {
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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printf("Updating NAND FLASH with image %s\n", au_image[i].name);
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debug ("nand_erase(%lx, %lx);\n", start, end);
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rc = nand_erase (nand_dev_desc, start, end - start + 1, 0);
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debug ("nand_erase returned %x\n", rc);
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debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
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rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0);
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debug ("nand_legacy_erase returned %x\n", rc);
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#endif
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}
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@@ -286,10 +294,10 @@ int au_do_update(int i, long sz)
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rc = flash_write((char *)addr, start, nbytes);
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} else {
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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debug ("nand_rw(%p, %lx %x)\n", addr, start, nbytes);
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rc = nand_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2,
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debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes);
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rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2,
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start, nbytes, (size_t *)&total, (uchar *)addr);
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debug ("nand_rw: ret=%x total=%d nbytes=%d\n", rc, total, nbytes);
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debug ("nand_legacy_rw: ret=%x total=%d nbytes=%d\n", rc, total, nbytes);
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#endif
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}
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if (rc != 0) {
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@@ -304,7 +312,7 @@ int au_do_update(int i, long sz)
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rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size));
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} else {
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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rc = nand_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
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rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
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start, nbytes, (size_t *)&total, (uchar *)addr);
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rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size));
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#endif
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@@ -38,3 +38,7 @@ TEXT_BASE = 0xFFFD0000
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endif
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endif
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endif
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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|
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@@ -29,3 +29,7 @@
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TEXT_BASE = 0xFFF80000
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#TEXT_BASE = 0xFFFC0000
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#TEXT_BASE = 0x00FC0000
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|
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
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BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
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|
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|
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@@ -697,7 +697,7 @@ void ide_set_reset(int on)
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|
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_legacy.h>
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extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
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|
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void nand_init(void)
|
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|
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@@ -26,3 +26,7 @@
|
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#
|
||||
|
||||
TEXT_BASE = 0xFFFC0000
|
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|
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# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
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|
||||
|
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@@ -265,7 +265,7 @@ int testdram (void)
|
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|
||||
|
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#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
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#include <linux/mtd/nand.h>
|
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#include <linux/mtd/nand_legacy.h>
|
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extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
void nand_init(void)
|
||||
|
||||
@@ -27,3 +27,6 @@
|
||||
|
||||
TEXT_BASE = 0xFFFC0000
|
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#TEXT_BASE = 0x00FC0000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
@@ -269,7 +269,7 @@ void ide_set_reset(int on)
|
||||
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
void nand_init(void)
|
||||
|
||||
@@ -26,3 +26,6 @@
|
||||
#
|
||||
|
||||
TEXT_BASE = 0xFFF80000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
@@ -343,7 +343,7 @@ void ide_set_reset(int on)
|
||||
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
void nand_init(void)
|
||||
|
||||
@@ -26,3 +26,6 @@
|
||||
#
|
||||
|
||||
TEXT_BASE = 0xFFFC0000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
@@ -239,7 +239,7 @@ int testdram (void)
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
void nand_init(void)
|
||||
|
||||
@@ -185,7 +185,7 @@ int testdram (void)
|
||||
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
void nand_init(void)
|
||||
|
||||
@@ -26,3 +26,6 @@
|
||||
#
|
||||
|
||||
TEXT_BASE = 0x40000000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
@@ -599,7 +599,7 @@ int board_early_init_f(void)
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
|
||||
extern ulong nand_probe(ulong physadr);
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
85
board/netstar/Makefile
Normal file
85
board/netstar/Makefile
Normal file
@@ -0,0 +1,85 @@
|
||||
#
|
||||
# (C) Copyright 2005
|
||||
# Ladislav Michl, 2N Telekomunikace, michl@2n.cz
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := netstar.o flash.o nand.o
|
||||
SOBJS := setup.o crcek.o
|
||||
|
||||
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
|
||||
|
||||
LOAD_ADDR = 0x10400000
|
||||
LDSCRIPT = $(TOPDIR)/board/$(BOARDDIR)/eeprom.lds
|
||||
|
||||
HOST_CFLAGS = -Wall -pedantic -I$(TOPDIR)/include
|
||||
|
||||
all: $(LIB) eeprom.srec eeprom.bin crcek.srec crcek.bin crcit
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $^
|
||||
|
||||
eeprom.srec: eeprom.o eeprom_start.o
|
||||
$(LD) -T $(LDSCRIPT) -g -Ttext $(LOAD_ADDR) \
|
||||
-o $(<:.o=) -e $(<:.o=) $^ \
|
||||
-L../../examples -lstubs \
|
||||
-L../../lib_generic -lgeneric \
|
||||
-L$(gcclibdir) -lgcc
|
||||
$(OBJCOPY) -O srec $(<:.o=) $@
|
||||
|
||||
eeprom.bin: eeprom.srec
|
||||
$(OBJCOPY) -I srec -O binary $< $@ 2>/dev/null
|
||||
|
||||
crcek.srec: crcek.o
|
||||
$(LD) -g -Ttext 0x00000000 \
|
||||
-o $(<:.o=) -e $(<:.o=) $^
|
||||
$(OBJCOPY) -O srec $(<:.o=) $@
|
||||
|
||||
crcek.bin: crcek.srec
|
||||
$(OBJCOPY) -I srec -O binary $< $@ 2>/dev/null
|
||||
|
||||
crcit: crcit.o crc32.o
|
||||
$(HOSTCC) $(HOST_CFLAGS) -o $@ $^
|
||||
|
||||
crcit.o: crcit.c
|
||||
$(HOSTCC) $(HOST_CFLAGS) -c $<
|
||||
|
||||
crc32.o: $(TOPDIR)/tools/crc32.c
|
||||
$(HOSTCC) $(HOST_CFLAGS) -DUSE_HOSTCC -c $<
|
||||
|
||||
clean:
|
||||
rm -f $(SOBJS) $(OBJS) eeprom eeprom.srec eeprom.bin \
|
||||
crcek crcek.srec crcek.bin
|
||||
|
||||
distclean: clean
|
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
|
||||
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
-include .depend
|
||||
|
||||
#########################################################################
|
||||
15
board/netstar/config.mk
Normal file
15
board/netstar/config.mk
Normal file
@@ -0,0 +1,15 @@
|
||||
#
|
||||
# Linux-Kernel is expected to be at 1000'8000,
|
||||
# entry 1000'8000 (mem base + reserved)
|
||||
#
|
||||
# We load ourself to internal RAM at 2001'2000
|
||||
# Check map file when changing TEXT_BASE.
|
||||
# Everything has fit into 192kB internal SRAM!
|
||||
#
|
||||
|
||||
# XXX TEXT_BASE = 0x20012000
|
||||
TEXT_BASE = 0x13FC0000
|
||||
|
||||
# Compile the new NAND code
|
||||
BOARDLIBS = drivers/nand/libnand.a
|
||||
|
||||
BIN
board/netstar/crcek
Executable file
BIN
board/netstar/crcek
Executable file
Binary file not shown.
177
board/netstar/crcek.S
Normal file
177
board/netstar/crcek.S
Normal file
@@ -0,0 +1,177 @@
|
||||
/**
|
||||
* (C) Copyright 2005
|
||||
* 2N Telekomunikace, Ladislav Michl <michl@2n.cz>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2.
|
||||
*
|
||||
* Image layout looks like following:
|
||||
* u32 - size
|
||||
* u32 - version
|
||||
* ... - data
|
||||
* u32 - crc32
|
||||
*/
|
||||
|
||||
#include "crcek.h"
|
||||
|
||||
/**
|
||||
* do_crc32 - calculate CRC32 of given buffer
|
||||
* r0 - crc
|
||||
* r1 - pointer to buffer
|
||||
* r2 - buffer len
|
||||
*/
|
||||
.macro do_crc32
|
||||
ldr r5, FFFFFFFF
|
||||
eor r0, r0, r5
|
||||
adr r3, CRC32_TABLE
|
||||
1:
|
||||
ldrb r4, [r1], #1
|
||||
eor r4, r4, r0
|
||||
and r4, r4, #0xff
|
||||
ldr r4, [r3, r4, lsl#2]
|
||||
eor r0, r4, r0, lsr#8
|
||||
subs r2, r2, #0x1
|
||||
bne 1b
|
||||
eor r0, r0, r5
|
||||
.endm
|
||||
|
||||
.macro crcuj, offset, size
|
||||
mov r0, #0
|
||||
ldr r1, \offset
|
||||
ldr r2, [r1]
|
||||
cmp r2, r0 @ no data, no problem
|
||||
beq 2f
|
||||
tst r2, #3 @ unaligned size
|
||||
bne 2f
|
||||
ldr r3, \size
|
||||
cmp r2, r3 @ bogus size
|
||||
bhi 2f
|
||||
add r1, r1, #4
|
||||
do_crc32
|
||||
ldr r1, [r1]
|
||||
2:
|
||||
cmp r0, r1
|
||||
.endm
|
||||
|
||||
.macro wait, reg
|
||||
mov \reg, #0x1000
|
||||
3:
|
||||
subs \reg, \reg, #0x1
|
||||
bne 3b
|
||||
|
||||
.endm
|
||||
.text
|
||||
.globl crcek
|
||||
crcek:
|
||||
b crc2_bad
|
||||
mov r6, #0
|
||||
crcuj _LOADER1_OFFSET, _LOADER_SIZE
|
||||
bne crc1_bad
|
||||
orr r6, r6, #1
|
||||
crc1_bad:
|
||||
crcuj _LOADER2_OFFSET, _LOADER_SIZE
|
||||
bne crc2_bad
|
||||
orr r6, r6, #2
|
||||
crc2_bad:
|
||||
ldr r3, _LOADER1_OFFSET
|
||||
ldr r4, _LOADER2_OFFSET
|
||||
b boot_2nd
|
||||
tst r6, #3
|
||||
beq one_is_bad @ one of them (or both) has bad crc
|
||||
ldr r1, [r3, #4]
|
||||
ldr r2, [r4, #4]
|
||||
cmp r1, r2 @ boot 2nd loader if versions differ
|
||||
beq boot_1st
|
||||
b boot_2nd
|
||||
one_is_bad:
|
||||
tst r6, #1
|
||||
bne boot_1st
|
||||
tst r6, #2
|
||||
bne boot_2nd
|
||||
@ We are doomed, so let user know.
|
||||
ldr r0, GPIO_BASE @ configure GPIO pins
|
||||
ldr r1, GPIO_DIRECTION
|
||||
strh r1, [r0, #0x08]
|
||||
blink_loop:
|
||||
mov r1, #0x08
|
||||
strh r1, [r0, #0x04]
|
||||
wait r3
|
||||
mov r1, #0x10
|
||||
strh r1, [r0, #0x04]
|
||||
wait r3
|
||||
b blink_loop
|
||||
boot_1st:
|
||||
add pc, r3, #8
|
||||
boot_2nd:
|
||||
add pc, r4, #8
|
||||
|
||||
_LOADER_SIZE:
|
||||
.word LOADER_SIZE - 8 @ minus size and crc32
|
||||
_LOADER1_OFFSET:
|
||||
.word LOADER1_OFFSET
|
||||
_LOADER2_OFFSET:
|
||||
.word LOADER2_OFFSET
|
||||
|
||||
FFFFFFFF:
|
||||
.word 0xffffffff
|
||||
CRC32_TABLE:
|
||||
.word 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419
|
||||
.word 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4
|
||||
.word 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07
|
||||
.word 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de
|
||||
.word 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856
|
||||
.word 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9
|
||||
.word 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4
|
||||
.word 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b
|
||||
.word 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3
|
||||
.word 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a
|
||||
.word 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599
|
||||
.word 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924
|
||||
.word 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190
|
||||
.word 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f
|
||||
.word 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e
|
||||
.word 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01
|
||||
.word 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed
|
||||
.word 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950
|
||||
.word 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3
|
||||
.word 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2
|
||||
.word 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a
|
||||
.word 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5
|
||||
.word 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010
|
||||
.word 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f
|
||||
.word 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17
|
||||
.word 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6
|
||||
.word 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615
|
||||
.word 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8
|
||||
.word 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344
|
||||
.word 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb
|
||||
.word 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a
|
||||
.word 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5
|
||||
.word 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1
|
||||
.word 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c
|
||||
.word 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef
|
||||
.word 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236
|
||||
.word 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe
|
||||
.word 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31
|
||||
.word 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c
|
||||
.word 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713
|
||||
.word 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b
|
||||
.word 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242
|
||||
.word 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1
|
||||
.word 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c
|
||||
.word 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278
|
||||
.word 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7
|
||||
.word 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66
|
||||
.word 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9
|
||||
.word 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605
|
||||
.word 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8
|
||||
.word 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b
|
||||
.word 0x2d02ef8d
|
||||
|
||||
GPIO_BASE:
|
||||
.word 0xfffce000
|
||||
GPIO_DIRECTION:
|
||||
.word 0x0000ffe7
|
||||
|
||||
.end
|
||||
3
board/netstar/crcek.h
Normal file
3
board/netstar/crcek.h
Normal file
@@ -0,0 +1,3 @@
|
||||
#define LOADER_SIZE (448 * 1024)
|
||||
#define LOADER1_OFFSET (128 * 1024)
|
||||
#define LOADER2_OFFSET (LOADER1_OFFSET + LOADER_SIZE)
|
||||
BIN
board/netstar/crcit
Executable file
BIN
board/netstar/crcit
Executable file
Binary file not shown.
86
board/netstar/crcit.c
Normal file
86
board/netstar/crcit.c
Normal file
@@ -0,0 +1,86 @@
|
||||
/*
|
||||
* (C) Copyright 2005
|
||||
* 2N Telekomunikace, Ladislav Michl <michl@2n.cz>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include <fcntl.h>
|
||||
#include <string.h>
|
||||
#include <unistd.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include "crcek.h"
|
||||
|
||||
extern unsigned long crc32(unsigned long, const unsigned char *, unsigned int);
|
||||
|
||||
uint32_t data[LOADER_SIZE/4 + 3];
|
||||
|
||||
int doit(char *path, unsigned version)
|
||||
{
|
||||
uint32_t *p;
|
||||
ssize_t size;
|
||||
int fd;
|
||||
|
||||
fd = open(path, O_RDONLY);
|
||||
if (fd == -1) {
|
||||
perror("Error opening file");
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
p = data + 2;
|
||||
size = read(fd, p, LOADER_SIZE + 4);
|
||||
if (size == -1) {
|
||||
perror("Error reading file");
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
if (size > LOADER_SIZE) {
|
||||
fprintf(stderr, "File too large\n");
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
size = (((size - 1) >> 2) + 1) << 2;
|
||||
data[0] = size + 4; /* add size of version field */
|
||||
data[1] = version;
|
||||
data[(size >> 2) + 2] = crc32(0, (unsigned char *)(data + 1), data[0]);
|
||||
close(fd);
|
||||
|
||||
if (write(STDOUT_FILENO, data, size + 3*4) == -1) {
|
||||
perror("Error writing file");
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
|
||||
return EXIT_SUCCESS;
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
if (argc == 2) {
|
||||
return doit(argv[1], 0);
|
||||
} else if ((argc == 4) && (strcmp(argv[1], "-v") == 0)) {
|
||||
char *endptr, *nptr = argv[2];
|
||||
unsigned ver = strtoul(nptr, &endptr, 0);
|
||||
if (nptr != '\0' && endptr == '\0')
|
||||
return doit(argv[3], ver);
|
||||
}
|
||||
fprintf(stderr, "Usage: crcit [-v version] <image>\n");
|
||||
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
BIN
board/netstar/eeprom
Executable file
BIN
board/netstar/eeprom
Executable file
Binary file not shown.
215
board/netstar/eeprom.c
Normal file
215
board/netstar/eeprom.c
Normal file
@@ -0,0 +1,215 @@
|
||||
/*
|
||||
* (C) Copyright 2005
|
||||
* Ladislav Michl, 2N Telekomunikace, michl@2n.cz
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* Some code shamelessly stolen back from Robin Getz.
|
||||
*/
|
||||
|
||||
#define DEBUG
|
||||
|
||||
#include <common.h>
|
||||
#include <exports.h>
|
||||
#include "../drivers/smc91111.h"
|
||||
|
||||
#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
|
||||
|
||||
static u16 read_eeprom_reg(u16 reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK(2);
|
||||
SMC_outw(reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK(1);
|
||||
SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
|
||||
CTL_REG);
|
||||
timeout = 100;
|
||||
while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
udelay(100);
|
||||
if (timeout == 0) {
|
||||
printf("Timeout Reading EEPROM register %02x\n", reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return SMC_inw (GP_REG);
|
||||
}
|
||||
|
||||
static int write_eeprom_reg(u16 value, u16 reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK(2);
|
||||
SMC_outw(reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK(1);
|
||||
SMC_outw(value, GP_REG);
|
||||
SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
|
||||
timeout = 100;
|
||||
while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout)
|
||||
udelay (100);
|
||||
if (timeout == 0) {
|
||||
printf("Timeout Writing EEPROM register %02x\n", reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int write_data(u16 *buf, int len)
|
||||
{
|
||||
u16 reg = 0x23;
|
||||
|
||||
while (len--)
|
||||
write_eeprom_reg(*buf++, reg++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int verify_macaddr(char *s)
|
||||
{
|
||||
u16 reg;
|
||||
int i, err = 0;
|
||||
|
||||
printf("MAC Address: ");
|
||||
err = i = 0;
|
||||
for (i = 0; i < 3; i++) {
|
||||
reg = read_eeprom_reg(0x20 + i);
|
||||
printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
|
||||
if (s)
|
||||
err |= reg != ((u16 *)s)[i];
|
||||
}
|
||||
|
||||
return err ? 0 : 1;
|
||||
}
|
||||
|
||||
static int set_mac(char *s)
|
||||
{
|
||||
int i;
|
||||
char *e, eaddr[6];
|
||||
|
||||
/* turn string into mac value */
|
||||
for (i = 0; i < 6; i++) {
|
||||
eaddr[i] = simple_strtoul(s, &e, 16);
|
||||
s = (*e) ? e+1 : e;
|
||||
}
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int parse_element(char *s, unsigned char *buf, int len)
|
||||
{
|
||||
int cnt;
|
||||
char *p, num[3];
|
||||
unsigned char id;
|
||||
|
||||
id = simple_strtoul(s, &p, 16);
|
||||
if (*p++ != ':')
|
||||
return -1;
|
||||
cnt = 2;
|
||||
num[2] = 0;
|
||||
for (; *p; p += 2) {
|
||||
if (p[1] == 0)
|
||||
return -2;
|
||||
if (cnt + 3 > len)
|
||||
return -3;
|
||||
num[0] = p[0];
|
||||
num[1] = p[1];
|
||||
buf[cnt++] = simple_strtoul(num, NULL, 16);
|
||||
}
|
||||
buf[0] = id;
|
||||
buf[1] = cnt - 2;
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
extern int crcek(void);
|
||||
|
||||
int eeprom(int argc, char *argv[])
|
||||
{
|
||||
int i, len, ret;
|
||||
unsigned char buf[58], *p;
|
||||
|
||||
app_startup(argv);
|
||||
if (get_version() != XF_VERSION) {
|
||||
printf("Wrong XF_VERSION.\n");
|
||||
printf("Application expects ABI version %d\n", XF_VERSION);
|
||||
printf("Actual U-Boot ABI version %d\n", (int)get_version());
|
||||
return 1;
|
||||
}
|
||||
|
||||
return crcek();
|
||||
|
||||
if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
printf("SMSC91111 not found.\n");
|
||||
return 2;
|
||||
}
|
||||
|
||||
/* Called without parameters - print MAC address */
|
||||
if (argc < 2) {
|
||||
verify_macaddr(NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Print help message */
|
||||
if (argv[1][1] == 'h') {
|
||||
printf("VoiceBlue EEPROM writer\n");
|
||||
printf("Built: %s at %s\n", __DATE__ , __TIME__ );
|
||||
printf("Usage:\n\t<mac_address> [<element_1>] [<...>]\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Try to parse information elements */
|
||||
len = sizeof(buf);
|
||||
p = buf;
|
||||
for (i = 2; i < argc; i++) {
|
||||
ret = parse_element(argv[i], p, len);
|
||||
switch (ret) {
|
||||
case -1:
|
||||
printf("Element %d: malformed\n", i - 1);
|
||||
return 3;
|
||||
case -2:
|
||||
printf("Element %d: odd character count\n", i - 1);
|
||||
return 3;
|
||||
case -3:
|
||||
printf("Out of EEPROM memory\n");
|
||||
return 3;
|
||||
default:
|
||||
p += ret;
|
||||
len -= ret;
|
||||
}
|
||||
}
|
||||
|
||||
/* First argument (MAC) is mandatory */
|
||||
set_mac(argv[1]);
|
||||
if (verify_macaddr(argv[1])) {
|
||||
printf("*** MAC address does not match! ***\n");
|
||||
return 4;
|
||||
}
|
||||
|
||||
while (len--)
|
||||
*p++ = 0;
|
||||
|
||||
write_data((u16 *)buf, sizeof(buf) >> 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
51
board/netstar/eeprom.lds
Normal file
51
board/netstar/eeprom.lds
Normal file
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||
* (C) Copyright 2005
|
||||
* Ladislav Michl, 2N Telekomunikace, <michl@2n.cz>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
eeprom_start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss) }
|
||||
_end = .;
|
||||
}
|
||||
177
board/netstar/eeprom_start.S
Normal file
177
board/netstar/eeprom_start.S
Normal file
@@ -0,0 +1,177 @@
|
||||
/*
|
||||
* Copyright (c) 2005 2N Telekomunikace
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
.globl _start
|
||||
_start: b eeprom
|
||||
|
||||
#include "crcek.h"
|
||||
|
||||
/**
|
||||
* do_crc32 - calculate CRC32 of given buffer
|
||||
* r0 - crc
|
||||
* r1 - pointer to buffer
|
||||
* r2 - buffer len
|
||||
*/
|
||||
.macro do_crc32
|
||||
ldr r5, FFFFFFFF
|
||||
eor r0, r0, r5
|
||||
adr r3, CRC32_TABLE
|
||||
1:
|
||||
ldrb r4, [r1], #1
|
||||
eor r4, r4, r0
|
||||
and r4, r4, #0xff
|
||||
ldr r4, [r3, r4, lsl#2]
|
||||
eor r0, r4, r0, lsr#8
|
||||
subs r2, r2, #0x1
|
||||
bne 1b
|
||||
eor r0, r0, r5
|
||||
.endm
|
||||
|
||||
.macro crcuj, offset, size
|
||||
ldr r1, \offset
|
||||
ldr r2, [r1]
|
||||
cmp r2, #0 @ no data, no problem
|
||||
beq 2f
|
||||
mov r7, #1
|
||||
tst r2, #3 @ unaligned size
|
||||
bne 2f
|
||||
mov r7, #2
|
||||
ldr r0, \size
|
||||
cmp r2, r0 @ bogus size
|
||||
bhi 2f
|
||||
mov r7, #3
|
||||
add r1, r1, #4
|
||||
mov r0, #0
|
||||
do_crc32
|
||||
ldr r1, [r1]
|
||||
2:
|
||||
cmp r0, r1
|
||||
.endm
|
||||
|
||||
.macro wait, reg
|
||||
mov \reg, #0x1000
|
||||
3:
|
||||
subs \reg, \reg, #0x1
|
||||
bne 3b
|
||||
|
||||
.endm
|
||||
.text
|
||||
.globl crcek
|
||||
crcek:
|
||||
mov r6, #0
|
||||
@ crcuj _LOADER1_OFFSET, _LOADER_SIZE
|
||||
@ bne crc1_bad
|
||||
@ orr r6, r6, #1
|
||||
crc1_bad:
|
||||
crcuj _LOADER2_OFFSET, _LOADER_SIZE
|
||||
bne crc2_bad
|
||||
orr r6, r6, #2
|
||||
crc2_bad:
|
||||
@ mov r0, r6
|
||||
mov pc, lr
|
||||
ldr r3, _LOADER1_OFFSET
|
||||
ldr r4, _LOADER2_OFFSET
|
||||
tst r6, #3
|
||||
beq one_is_bad @ one of them (or both) has bad crc
|
||||
ldr r1, [r3, #4]
|
||||
ldr r2, [r4, #4]
|
||||
cmp r1, r2 @ boot 2nd loader if versions differ
|
||||
beq boot_1st
|
||||
b boot_2nd
|
||||
one_is_bad:
|
||||
tst r6, #1
|
||||
bne boot_1st
|
||||
tst r6, #2
|
||||
bne boot_2nd
|
||||
@ We are doomed, so let user know.
|
||||
ldr r0, GPIO_BASE @ configure GPIO pins
|
||||
ldr r1, GPIO_DIRECTION
|
||||
strh r1, [r0, #0x08]
|
||||
blink_loop:
|
||||
mov r1, #0x08
|
||||
strh r1, [r0, #0x04]
|
||||
wait r3
|
||||
mov r1, #0x10
|
||||
strh r1, [r0, #0x04]
|
||||
wait r3
|
||||
b blink_loop
|
||||
boot_1st:
|
||||
add pc, r3, #8
|
||||
boot_2nd:
|
||||
add pc, r4, #8
|
||||
|
||||
_LOADER_SIZE:
|
||||
.word LOADER_SIZE - 8 @ minus size and crc32
|
||||
_LOADER1_OFFSET:
|
||||
.word LOADER1_OFFSET
|
||||
_LOADER2_OFFSET:
|
||||
.word LOADER2_OFFSET
|
||||
|
||||
FFFFFFFF:
|
||||
.word 0xffffffff
|
||||
CRC32_TABLE:
|
||||
.word 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419
|
||||
.word 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4
|
||||
.word 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07
|
||||
.word 0x90bf1d91, 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de
|
||||
.word 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, 0x136c9856
|
||||
.word 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9
|
||||
.word 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4
|
||||
.word 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b
|
||||
.word 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3
|
||||
.word 0x45df5c75, 0xdcd60dcf, 0xabd13d59, 0x26d930ac, 0x51de003a
|
||||
.word 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599
|
||||
.word 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924
|
||||
.word 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190
|
||||
.word 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f
|
||||
.word 0x9fbfe4a5, 0xe8b8d433, 0x7807c9a2, 0x0f00f934, 0x9609a88e
|
||||
.word 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01
|
||||
.word 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed
|
||||
.word 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950
|
||||
.word 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3
|
||||
.word 0xfbd44c65, 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2
|
||||
.word 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a
|
||||
.word 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5
|
||||
.word 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, 0xbe0b1010
|
||||
.word 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f
|
||||
.word 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17
|
||||
.word 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6
|
||||
.word 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615
|
||||
.word 0x73dc1683, 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8
|
||||
.word 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, 0xf00f9344
|
||||
.word 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb
|
||||
.word 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a
|
||||
.word 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5
|
||||
.word 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1
|
||||
.word 0xa6bc5767, 0x3fb506dd, 0x48b2364b, 0xd80d2bda, 0xaf0a1b4c
|
||||
.word 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef
|
||||
.word 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236
|
||||
.word 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe
|
||||
.word 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31
|
||||
.word 0x2cd99e8b, 0x5bdeae1d, 0x9b64c2b0, 0xec63f226, 0x756aa39c
|
||||
.word 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713
|
||||
.word 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b
|
||||
.word 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242
|
||||
.word 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1
|
||||
.word 0x18b74777, 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c
|
||||
.word 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, 0xa00ae278
|
||||
.word 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7
|
||||
.word 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, 0x40df0b66
|
||||
.word 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9
|
||||
.word 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605
|
||||
.word 0xcdd70693, 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8
|
||||
.word 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b
|
||||
.word 0x2d02ef8d
|
||||
|
||||
GPIO_BASE:
|
||||
.word 0xfffce000
|
||||
GPIO_DIRECTION:
|
||||
.word 0x0000ffe7
|
||||
|
||||
.end
|
||||
343
board/netstar/flash.c
Normal file
343
board/netstar/flash.c
Normal file
@@ -0,0 +1,343 @@
|
||||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Alex Zuepke <azu@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2005
|
||||
* 2N Telekomunikace, a.s. <www.2n.cz>
|
||||
* Ladislav Michl <michl@2n.cz>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
/*#if 0 */
|
||||
#if (PHYS_SDRAM_1_SIZE != SZ_32M)
|
||||
|
||||
#include "crcek.h"
|
||||
|
||||
#if (CFG_MAX_FLASH_BANKS > 1)
|
||||
#error There is always only _one_ flash chip
|
||||
#endif
|
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
|
||||
|
||||
#define CMD_READ_ARRAY 0x000000f0
|
||||
#define CMD_UNLOCK1 0x000000aa
|
||||
#define CMD_UNLOCK2 0x00000055
|
||||
#define CMD_ERASE_SETUP 0x00000080
|
||||
#define CMD_ERASE_CONFIRM 0x00000030
|
||||
#define CMD_PROGRAM 0x000000a0
|
||||
#define CMD_UNLOCK_BYPASS 0x00000020
|
||||
|
||||
#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
|
||||
#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002aa << 1)))
|
||||
|
||||
#define BIT_ERASE_DONE 0x00000080
|
||||
#define BIT_RDY_MASK 0x00000080
|
||||
#define BIT_PROGRAM_ERROR 0x00000020
|
||||
#define BIT_TIMEOUT 0x80000000 /* our flag */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
ulong flash_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
flash_info[0].flash_id = (AMD_MANUFACT & FLASH_VENDMASK) |
|
||||
(AMD_ID_LV800B & FLASH_TYPEMASK);
|
||||
flash_info[0].size = PHYS_FLASH_1_SIZE;
|
||||
flash_info[0].sector_count = CFG_MAX_FLASH_SECT;
|
||||
memset(flash_info[0].protect, 0, CFG_MAX_FLASH_SECT);
|
||||
|
||||
for (i = 0; i < flash_info[0].sector_count; i++) {
|
||||
switch (i) {
|
||||
case 0: /* 16kB */
|
||||
flash_info[0].start[0] = CFG_FLASH_BASE;
|
||||
break;
|
||||
case 1: /* 8kB */
|
||||
flash_info[0].start[1] = CFG_FLASH_BASE + 0x4000;
|
||||
break;
|
||||
case 2: /* 8kB */
|
||||
flash_info[0].start[2] = CFG_FLASH_BASE + 0x4000 +
|
||||
0x2000;
|
||||
break;
|
||||
case 3: /* 32 KB */
|
||||
flash_info[0].start[3] = CFG_FLASH_BASE + 0x4000 +
|
||||
2 * 0x2000;
|
||||
break;
|
||||
case 4:
|
||||
flash_info[0].start[4] = CFG_FLASH_BASE + 0x4000 +
|
||||
2 * 0x2000 + 0x8000;
|
||||
break;
|
||||
default: /* 64kB */
|
||||
flash_info[0].start[i] = flash_info[0].start[i-1] +
|
||||
0x10000;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* U-Boot */
|
||||
flash_protect(FLAG_PROTECT_SET,
|
||||
LOADER1_OFFSET,
|
||||
LOADER1_OFFSET + LOADER_SIZE - 1, flash_info);
|
||||
/* Protect crcek, env and r_env as well */
|
||||
flash_protect(FLAG_PROTECT_SET, 0, 0x8000 - 1, flash_info);
|
||||
|
||||
return flash_info[0].size;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_print_info(flash_info_t *info)
|
||||
{
|
||||
int i;
|
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case (AMD_MANUFACT & FLASH_VENDMASK):
|
||||
puts("AMD: ");
|
||||
break;
|
||||
default:
|
||||
puts("Unknown vendor ");
|
||||
break;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
||||
case (AMD_ID_LV800B & FLASH_TYPEMASK):
|
||||
puts("AM29LV800BB (8Mb)\n");
|
||||
break;
|
||||
default:
|
||||
puts("Unknown chip type\n");
|
||||
return;
|
||||
}
|
||||
|
||||
printf(" Size: %ld MB in %d sectors\n",
|
||||
info->size >> 20, info->sector_count);
|
||||
|
||||
puts(" Sector start addresses:");
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
if ((i % 5) == 0)
|
||||
puts("\n ");
|
||||
|
||||
printf(" %08lX%s", info->start[i],
|
||||
info->protect[i] ? " (RO)" : " ");
|
||||
}
|
||||
puts("\n");
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int flash_erase(flash_info_t *info, int s_first, int s_last)
|
||||
{
|
||||
ushort result;
|
||||
int prot, sect;
|
||||
int rc = ERR_OK;
|
||||
|
||||
/* first look for protection bits */
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN)
|
||||
return ERR_UNKNOWN_FLASH_TYPE;
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last))
|
||||
return ERR_INVAL;
|
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) !=
|
||||
(AMD_MANUFACT & FLASH_VENDMASK))
|
||||
return ERR_UNKNOWN_FLASH_VENDOR;
|
||||
|
||||
prot = 0;
|
||||
for (sect = s_first; sect <= s_last; ++sect)
|
||||
if (info->protect[sect])
|
||||
prot++;
|
||||
|
||||
if (prot)
|
||||
printf("- Warning: %d protected sectors will not be erased!\n",
|
||||
prot);
|
||||
else
|
||||
putc('\n');
|
||||
|
||||
/* Start erase on unprotected sectors */
|
||||
for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
|
||||
if (info->protect[sect] == 0) { /* not protected */
|
||||
vu_short *addr = (vu_short *) (info->start[sect]);
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
reset_timer_masked();
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
|
||||
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
|
||||
MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
|
||||
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
|
||||
*addr = CMD_ERASE_CONFIRM;
|
||||
|
||||
/* wait until flash is ready */
|
||||
while (1) {
|
||||
result = *addr;
|
||||
|
||||
/* check timeout */
|
||||
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
|
||||
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
|
||||
rc = ERR_TIMOUT;
|
||||
break;
|
||||
}
|
||||
|
||||
if ((result & 0xfff) & BIT_ERASE_DONE)
|
||||
break;
|
||||
|
||||
if ((result & 0xffff) & BIT_PROGRAM_ERROR) {
|
||||
rc = ERR_PROG_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
|
||||
|
||||
if (rc != ERR_OK)
|
||||
goto out;
|
||||
|
||||
putc('.');
|
||||
}
|
||||
}
|
||||
out:
|
||||
/* allow flash to settle - wait 10 ms */
|
||||
udelay_masked(10000);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash
|
||||
*/
|
||||
|
||||
volatile static int write_hword(flash_info_t *info, ulong dest, ushort data)
|
||||
{
|
||||
vu_short *addr = (vu_short *) dest;
|
||||
ushort result;
|
||||
int rc = ERR_OK;
|
||||
|
||||
/* check if flash is (sufficiently) erased */
|
||||
result = *addr;
|
||||
if ((result & data) != data)
|
||||
return ERR_NOT_ERASED;
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
|
||||
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
|
||||
MEM_FLASH_ADDR1 = CMD_PROGRAM;
|
||||
*addr = data;
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
reset_timer_masked();
|
||||
|
||||
/* wait until flash is ready */
|
||||
while (1) {
|
||||
result = *addr;
|
||||
|
||||
/* check timeout */
|
||||
if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
|
||||
rc = ERR_TIMOUT;
|
||||
break;
|
||||
}
|
||||
|
||||
if ((result & 0x80) == (data & 0x80))
|
||||
break;
|
||||
|
||||
if ((result & 0xffff) & BIT_PROGRAM_ERROR) {
|
||||
result = *addr;
|
||||
|
||||
if ((result & 0x80) != (data & 0x80))
|
||||
rc = ERR_PROG_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
*addr = CMD_READ_ARRAY;
|
||||
|
||||
if (*addr != data)
|
||||
rc = ERR_PROG_ERROR;
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash.
|
||||
*/
|
||||
|
||||
int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp;
|
||||
int l;
|
||||
int i, rc;
|
||||
ushort data;
|
||||
|
||||
wp = (addr & ~1); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
if ((l = addr - wp) != 0) {
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp)
|
||||
data = (data >> 8) | (*(uchar *) cp << 8);
|
||||
for (; i < 2 && cnt > 0; ++i) {
|
||||
data = (data >> 8) | (*src++ << 8);
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt == 0 && i < 2; ++i, ++cp)
|
||||
data = (data >> 8) | (*(uchar *) cp << 8);
|
||||
|
||||
if ((rc = write_hword(info, wp, data)) != 0)
|
||||
return (rc);
|
||||
wp += 2;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 2) {
|
||||
data = *((vu_short *) src);
|
||||
if ((rc = write_hword(info, wp, data)) != 0)
|
||||
return (rc);
|
||||
src += 2;
|
||||
wp += 2;
|
||||
cnt -= 2;
|
||||
}
|
||||
|
||||
if (cnt == 0)
|
||||
return ERR_OK;
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
|
||||
data = (data >> 8) | (*src++ << 8);
|
||||
--cnt;
|
||||
}
|
||||
for (; i < 2; ++i, ++cp)
|
||||
data = (data >> 8) | (*(uchar *) cp << 8);
|
||||
|
||||
return write_hword(info, wp, data);
|
||||
}
|
||||
|
||||
#endif
|
||||
64
board/netstar/nand.c
Normal file
64
board/netstar/nand.c
Normal file
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
|
||||
#include <nand.h>
|
||||
|
||||
/*
|
||||
* hardware specific access to control-lines
|
||||
*/
|
||||
#define MASK_CLE 0x02
|
||||
#define MASK_ALE 0x04
|
||||
|
||||
static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd)
|
||||
{
|
||||
struct nand_chip *this = mtd->priv;
|
||||
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
|
||||
|
||||
IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
|
||||
switch (cmd) {
|
||||
case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break;
|
||||
case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break;
|
||||
}
|
||||
this->IO_ADDR_W = (void *) IO_ADDR_W;
|
||||
}
|
||||
|
||||
/*
|
||||
* chip R/B detection
|
||||
*/
|
||||
static int netstar_nand_ready(struct mtd_info *mtd)
|
||||
{
|
||||
return (*(volatile ushort *)GPIO_DATA_INPUT_REG) & 0x02;
|
||||
}
|
||||
|
||||
void board_nand_init(struct nand_chip *nand)
|
||||
{
|
||||
nand->options = NAND_SAMSUNG_LP_OPTIONS;
|
||||
nand->eccmode = NAND_ECC_SOFT;
|
||||
nand->hwcontrol = netstar_nand_hwcontrol;
|
||||
/* nand->dev_ready = netstar_nand_ready; */
|
||||
nand->chip_delay = 18;
|
||||
}
|
||||
#endif
|
||||
68
board/netstar/netstar.c
Normal file
68
board/netstar/netstar.c
Normal file
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* arch number of NetStar board */
|
||||
/* TODO: use define from asm/mach-types.h */
|
||||
gd->bd->bi_arch_number = 692;
|
||||
|
||||
/* adress of boot parameters */
|
||||
gd->bd->bi_boot_params = 0x10000100;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
||||
|
||||
/* Take the Ethernet controller out of reset and wait
|
||||
* for the EEPROM load to complete. */
|
||||
*((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80;
|
||||
udelay(10); /* doesn't work before interrupt_init call */
|
||||
*((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80;
|
||||
udelay(500);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern void partition_flash(void);
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern void nand_init(void);
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
287
board/netstar/setup.S
Normal file
287
board/netstar/setup.S
Normal file
@@ -0,0 +1,287 @@
|
||||
/*
|
||||
* Board specific setup info
|
||||
*
|
||||
* (C) Copyright 2004 Ales Jindra <jindra@2n.cz>
|
||||
* (C) Copyright 2005 Ladislav Michl <michl@2n.cz>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
|
||||
_TEXT_BASE:
|
||||
.word TEXT_BASE /* SDRAM load addr from config.mk */
|
||||
|
||||
OMAP5910_LPG1_BASE: .word 0xfffbd000
|
||||
OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800
|
||||
OMAP5910_MPU_TC_BASE: .word 0xfffecc00
|
||||
OMAP5910_MPU_CLKM_BASE: .word 0xfffece00
|
||||
OMAP5910_ULPD_PWR_MNG_BASE: .word 0xfffe0800
|
||||
OMAP5910_DPLL1_BASE: .word 0xfffecf00
|
||||
OMAP5910_GPIO_BASE: .word 0xfffce000
|
||||
OMAP5910_MPU_WD_TIMER_BASE: .word 0xfffec800
|
||||
OMAP5910_MPUI_BASE: .word 0xfffec900
|
||||
|
||||
_OMAP5910_ARM_CKCTL: .word OMAP5910_ARM_CKCTL
|
||||
_OMAP5910_ARM_EN_CLK: .word OMAP5910_ARM_EN_CLK
|
||||
|
||||
OMAP5910_MPUI_CTRL: .word 0x0000ff1b
|
||||
|
||||
VAL_EMIFS_CS0_CONFIG: .word 0x00009090
|
||||
VAL_EMIFS_CS1_CONFIG: .word 0x00003031
|
||||
VAL_EMIFS_CS2_CONFIG: .word 0x0000a0a1
|
||||
VAL_EMIFS_CS3_CONFIG: .word 0x0000c0c0
|
||||
VAL_EMIFS_DYN_WAIT: .word 0x00000000
|
||||
/* autorefresh counter 0x246 ((64000000/13.4)-400)/8192) */
|
||||
/* SLRF SD_RET ARE SDRAM_TYPE ARCV SDRAM_FREQUENCY PWD CLK */
|
||||
|
||||
#if (PHYS_SDRAM_1_SIZE == SZ_32M)
|
||||
VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xf << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27))
|
||||
#else
|
||||
VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xd << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27))
|
||||
#endif
|
||||
|
||||
VAL_EMIFF_SDRAM_CONFIG2: .word 0x00000003
|
||||
VAL_EMIFF_MRS: .word 0x00000037
|
||||
|
||||
/*
|
||||
* GPIO04 - Green LED (Red LED is connected to LED Pulse Generator)
|
||||
* GPIO07 - LAN91C111 reset
|
||||
*/
|
||||
GPIO_DIRECTION:
|
||||
.word 0x0000ff6f
|
||||
/*
|
||||
* Disable everything (green LED is connected via invertor)
|
||||
*/
|
||||
GPIO_OUTPUT:
|
||||
.word 0x00000010
|
||||
|
||||
MUX_CONFIG_BASE:
|
||||
.word 0xfffe1000
|
||||
|
||||
MUX_CONFIG_VALUES:
|
||||
.align 4
|
||||
.word 0x00000000 @ FUNC_MUX_CTRL_0
|
||||
.word 0x00000000 @ FUNC_MUX_CTRL_1
|
||||
.word 0x00000000 @ FUNC_MUX_CTRL_2
|
||||
.word 0x00000000 @ FUNC_MUX_CTRL_3
|
||||
.word 0x00000000 @ FUNC_MUX_CTRL_4
|
||||
.word 0x02080480 @ FUNC_MUX_CTRL_5
|
||||
.word 0x0100001c @ FUNC_MUX_CTRL_6
|
||||
.word 0x0004800b @ FUNC_MUX_CTRL_7
|
||||
.word 0x10001200 @ FUNC_MUX_CTRL_8
|
||||
.word 0x01201012 @ FUNC_MUX_CTRL_9
|
||||
.word 0x02082248 @ FUNC_MUX_CTRL_A
|
||||
.word 0x00000248 @ FUNC_MUX_CTRL_B
|
||||
.word 0x12240000 @ FUNC_MUX_CTRL_C
|
||||
.word 0x00002000 @ FUNC_MUX_CTRL_D
|
||||
.word 0x00000000 @ PULL_DWN_CTRL_0
|
||||
.word 0x00000800 @ PULL_DWN_CTRL_1
|
||||
.word 0x01801000 @ PULL_DWN_CTRL_2
|
||||
.word 0x00000000 @ PULL_DWN_CTRL_3
|
||||
.word 0x00000000 @ GATE_INH_CTRL_0
|
||||
.word 0x00000000 @ VOLTAGE_CTRL_0
|
||||
.word 0x00000000 @ TEST_DBG_CTRL_0
|
||||
.word 0x00000006 @ MOD_CONF_CTRL_0
|
||||
.word 0x0000eaef @ COMP_MODE_CTRL_0
|
||||
|
||||
MUX_CONFIG_OFFSETS:
|
||||
.align 1
|
||||
.byte 0x00 @ FUNC_MUX_CTRL_0
|
||||
.byte 0x04 @ FUNC_MUX_CTRL_1
|
||||
.byte 0x08 @ FUNC_MUX_CTRL_2
|
||||
.byte 0x10 @ FUNC_MUX_CTRL_3
|
||||
.byte 0x14 @ FUNC_MUX_CTRL_4
|
||||
.byte 0x18 @ FUNC_MUX_CTRL_5
|
||||
.byte 0x1c @ FUNC_MUX_CTRL_6
|
||||
.byte 0x20 @ FUNC_MUX_CTRL_7
|
||||
.byte 0x24 @ FUNC_MUX_CTRL_8
|
||||
.byte 0x28 @ FUNC_MUX_CTRL_9
|
||||
.byte 0x2c @ FUNC_MUX_CTRL_A
|
||||
.byte 0x30 @ FUNC_MUX_CTRL_B
|
||||
.byte 0x34 @ FUNC_MUX_CTRL_C
|
||||
.byte 0x38 @ FUNC_MUX_CTRL_D
|
||||
.byte 0x40 @ PULL_DWN_CTRL_0
|
||||
.byte 0x44 @ PULL_DWN_CTRL_1
|
||||
.byte 0x48 @ PULL_DWN_CTRL_2
|
||||
.byte 0x4c @ PULL_DWN_CTRL_3
|
||||
.byte 0x50 @ GATE_INH_CTRL_0
|
||||
.byte 0x60 @ VOLTAGE_CTRL_0
|
||||
.byte 0x70 @ TEST_DBG_CTRL_0
|
||||
.byte 0x80 @ MOD_CONF_CTRL_0
|
||||
.byte 0x0c @ COMP_MODE_CTRL_0
|
||||
.byte 0xff
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/* Improve performance a bit... */
|
||||
mrc p15, 0, r1, c0, c0, 0 @ read C15 ID register
|
||||
mrc p15, 0, r1, c0, c0, 1 @ read C15 Cache information register
|
||||
mrc p15, 0, r1, c1, c0, 0 @ read C15 Control register
|
||||
orr r1, r1, #0x1000 @ enable I-cache, map interrupt vector 0xffff0000
|
||||
mcr p15, 0, r1, c1, c0, 0 @ write C15 Control register
|
||||
mov r1, #0x00
|
||||
mcr p15, 0, r1, c7, c5, 0 @ Flush I-cache
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
/* Setup clocking mode */
|
||||
ldr r0, OMAP5910_MPU_CLKM_BASE @ prepare base of CLOCK unit
|
||||
ldrh r1, [r0, #0x18] @ get reset status
|
||||
bic r1, r1, #(7 << 11) @ clear clock select
|
||||
orr r1, r1, #(2 << 11) @ set synchronous scalable
|
||||
mov r2, #0 @ set wait counter to 100 clock cycles
|
||||
|
||||
icache_loop:
|
||||
cmp r2, #0x01
|
||||
streqh r1, [r0, #0x18]
|
||||
add r2, r2, #0x01
|
||||
cmp r2, #0x10
|
||||
bne icache_loop
|
||||
nop
|
||||
|
||||
/* Setup clock divisors */
|
||||
ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit
|
||||
ldr r1, _OMAP5910_ARM_CKCTL
|
||||
orr r1, r1, #0x2000 @ enable DSP clock
|
||||
strh r1, [r0, #0x00] @ setup clock divisors
|
||||
|
||||
/* Setup DPLL to generate requested freq */
|
||||
ldr r0, OMAP5910_DPLL1_BASE @ base of DPLL1 register
|
||||
mov r1, #0x0010 @ set PLL_ENABLE
|
||||
orr r1, r1, #0x2000 @ set IOB to new locking
|
||||
orr r1, r1, #(OMAP5910_DPLL_MUL << 7) @ setup multiplier CLKREF
|
||||
orr r1, r1, #(OMAP5910_DPLL_DIV << 5) @ setup divider CLKREF
|
||||
strh r1, [r0] @ write
|
||||
|
||||
locking:
|
||||
ldrh r1, [r0] @ get DPLL value
|
||||
tst r1, #0x01
|
||||
beq locking @ while LOCK not set
|
||||
|
||||
/* Enable clock */
|
||||
ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit
|
||||
mov r1, #(1 << 10) @ disable idle mode do not check
|
||||
@ nWAKEUP pin, other remain active
|
||||
strh r1, [r0, #0x04]
|
||||
ldr r1, _OMAP5910_ARM_EN_CLK
|
||||
strh r1, [r0, #0x08]
|
||||
mov r1, #0x003f @ FLASH.RP not enabled in idle and
|
||||
@ max delayed ( 32 x CLKIN )
|
||||
strh r1, [r0, #0x0c]
|
||||
|
||||
/* Configure 5910 pins functions to match our board. */
|
||||
ldr r0, MUX_CONFIG_BASE
|
||||
adr r1, MUX_CONFIG_VALUES
|
||||
adr r2, MUX_CONFIG_OFFSETS
|
||||
next_mux_cfg:
|
||||
ldrb r3, [r2], #1
|
||||
ldr r4, [r1], #4
|
||||
cmp r3, #0xff
|
||||
strne r4, [r0, r3]
|
||||
bne next_mux_cfg
|
||||
|
||||
/* Configure GPIO pins (also disables Green LED) */
|
||||
ldr r0, OMAP5910_GPIO_BASE
|
||||
ldr r1, GPIO_OUTPUT
|
||||
strh r1, [r0, #0x04]
|
||||
ldr r1, GPIO_DIRECTION
|
||||
strh r1, [r0, #0x08]
|
||||
|
||||
/* EnablePeripherals */
|
||||
ldr r0, OMAP5910_MPU_CLKM_BASE @ CLOCK unit
|
||||
mov r1, #0x0001 @ Peripheral enable
|
||||
strh r1, [r0, #0x14]
|
||||
|
||||
/* Program LED Pulse Generator */
|
||||
ldr r0, OMAP5910_LPG1_BASE @ 1st LED Pulse Generator
|
||||
mov r1, #0x7F @ Set obscure frequency in
|
||||
strb r1, [r0, #0x00] @ LCR
|
||||
mov r1, #0x01 @ Enable clock (CLK_EN) in
|
||||
strb r1, [r0, #0x04] @ PMR
|
||||
|
||||
/* TIPB Lock UART1 */
|
||||
ldr r0, OMAP5910_TIPB_SWITCHES_BASE @ prepare base of TIPB switches
|
||||
mov r1, #1 @ ARM allocated
|
||||
strh r1, [r0,#0x04] @ clear IRQ line and status bits
|
||||
strh r1, [r0,#0x00]
|
||||
ldrh r1, [r0,#0x04]
|
||||
|
||||
/* Disable watchdog */
|
||||
ldr r0, OMAP5910_MPU_WD_TIMER_BASE
|
||||
mov r1, #0xf5
|
||||
strh r1, [r0, #0x8]
|
||||
mov r1, #0xa0
|
||||
strh r1, [r0, #0x8]
|
||||
|
||||
/* Enable MCLK */
|
||||
ldr r0, OMAP5910_ULPD_PWR_MNG_BASE
|
||||
mov r1, #0x6
|
||||
strh r1, [r0, #0x34]
|
||||
strh r1, [r0, #0x34]
|
||||
|
||||
/* Setup clock divisors */
|
||||
ldr r0, OMAP5910_ULPD_PWR_MNG_BASE @ base of ULDPL DPLL1 register
|
||||
|
||||
mov r1, #0x0010 @ set PLL_ENABLE
|
||||
orr r1, r1, #0x2000 @ set IOB to new locking
|
||||
strh r1, [r0] @ write
|
||||
|
||||
ulocking:
|
||||
ldrh r1, [r0] @ get DPLL value
|
||||
tst r1, #1
|
||||
beq ulocking @ while LOCK not set
|
||||
|
||||
/* EMIF init */
|
||||
ldr r0, OMAP5910_MPU_TC_BASE
|
||||
ldrh r1, [r0, #0x0c] @ EMIFS_CONFIG_REG
|
||||
bic r1, r1, #0x0c @ pwr down disabled, flash WP
|
||||
orr r1, r1, #0x01
|
||||
str r1, [r0, #0x0c]
|
||||
|
||||
ldr r1, VAL_EMIFS_CS0_CONFIG
|
||||
str r1, [r0, #0x10] @ EMIFS_CS0_CONFIG
|
||||
ldr r1, VAL_EMIFS_CS1_CONFIG
|
||||
str r1, [r0, #0x14] @ EMIFS_CS1_CONFIG
|
||||
ldr r1, VAL_EMIFS_CS2_CONFIG
|
||||
str r1, [r0, #0x18] @ EMIFS_CS2_CONFIG
|
||||
ldr r1, VAL_EMIFS_CS3_CONFIG
|
||||
str r1, [r0, #0x1c] @ EMIFS_CS3_CONFIG
|
||||
ldr r1, VAL_EMIFS_DYN_WAIT
|
||||
str r1, [r0, #0x40] @ EMIFS_CFG_DYN_WAIT
|
||||
|
||||
/* Setup SDRAM */
|
||||
ldr r1, VAL_EMIFF_SDRAM_CONFIG
|
||||
str r1, [r0, #0x20] @ EMIFF_SDRAM_CONFIG
|
||||
ldr r1, VAL_EMIFF_SDRAM_CONFIG2
|
||||
str r1, [r0, #0x3c] @ EMIFF_SDRAM_CONFIG2
|
||||
ldr r1, VAL_EMIFF_MRS
|
||||
str r1, [r0, #0x24] @ EMIFF_MRS
|
||||
/* SDRAM needs 100us to stabilize */
|
||||
mov r0, #0x4000
|
||||
sdelay:
|
||||
subs r0, r0, #0x1
|
||||
bne sdelay
|
||||
|
||||
/* back to arch calling code */
|
||||
mov pc, lr
|
||||
.end
|
||||
55
board/netstar/u-boot.lds
Normal file
55
board/netstar/u-boot.lds
Normal file
@@ -0,0 +1,55 @@
|
||||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
cpu/arm925t/start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss) }
|
||||
_end = .;
|
||||
}
|
||||
@@ -26,3 +26,7 @@
|
||||
#
|
||||
|
||||
TEXT_BASE = 0x40000000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
|
||||
@@ -597,7 +597,7 @@ int board_early_init_f(void)
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
|
||||
extern ulong nand_probe(ulong physadr);
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
@@ -26,3 +26,6 @@
|
||||
#
|
||||
|
||||
TEXT_BASE = 0x40000000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
@@ -418,7 +418,7 @@ int board_early_init_f(void)
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
|
||||
extern ulong nand_probe(ulong physadr);
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
@@ -32,7 +32,7 @@
|
||||
#include <i2c.h>
|
||||
#include <asm/mach-types.h>
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
#endif
|
||||
|
||||
|
||||
@@ -26,3 +26,6 @@
|
||||
#
|
||||
|
||||
TEXT_BASE = 0xF8000000
|
||||
|
||||
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
|
||||
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
#endif
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
#endif
|
||||
|
||||
|
||||
@@ -576,7 +576,7 @@ int board_early_init_f(void)
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/nand_legacy.h>
|
||||
|
||||
extern ulong nand_probe(ulong physadr);
|
||||
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
|
||||
|
||||
Reference in New Issue
Block a user