// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2025 NXP
 */

#include "imx943-u-boot.dtsi"

&enetc1 {
	clocks = <&scmi_clk IMX94_CLK_MAC4>;
	clock-names = "enet_ref_clk";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_eth3>;
	phy-handle = <&ethphy5>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&enetc2 {
	clocks = <&scmi_clk IMX94_CLK_MAC5>;
	clock-names = "enet_ref_clk";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_eth4>;
	phy-handle = <&ethphy6>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&lpi2c3 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c3>;
	status = "okay";

	pca9548_i2c3: i2c-mux@77 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x77>;

		i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <5>;

			pcal6416_i2c3_u171: gpio@21 {
				compatible = "nxp,pcal6416";
				reg = <0x21>;
				gpio-controller;
				#gpio-cells = <2>;

				ethphy2-on-hog {
					gpio-hog;
					gpios = <2 GPIO_ACTIVE_HIGH>;
					output-high;
				};

				ethphy3-on-hog {
					gpio-hog;
					gpios = <3 GPIO_ACTIVE_HIGH>;
					output-high;
				};

				ethphy4-on-hog {
					gpio-hog;
					gpios = <4 GPIO_ACTIVE_HIGH>;
					output-high;
				};

				lvds-en-hog {
					gpio-hog;
					gpios = <9 GPIO_ACTIVE_HIGH>;
					output-high;
				};
			};
		};
	};
};

&lpuart1 {
	bootph-pre-ram;
};

&netc_blk_ctrl {
	assigned-clocks = <&scmi_clk IMX94_CLK_MAC2>,
			  <&scmi_clk IMX94_CLK_MAC4>,
			  <&scmi_clk IMX94_CLK_MAC5>;
	assigned-clock-parents = <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>,
				 <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>,
				 <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>;
	assigned-clock-rates = <250000000>, <250000000>, <250000000>;
	status = "okay";
};

&netc_emdio {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_emdio>;
	phy-supply = <&reg_gpy_en>;
	status = "okay";

	ethphy5: ethernet-phy@6 {
		reg = <0x6>;
		realtek,clkout-disable;
	};

	ethphy6: ethernet-phy@7 {
		reg = <0x7>;
		realtek,clkout-disable;
	};
};

&reg_usdhc2_vmmc {
	bootph-pre-ram;
};

&usb2 {
	dr_mode = "host";
	hnp-disable;
	srp-disable;
	adp-disable;
	disable-over-current;
	status = "okay";
};

&usb3 {
	bootph-pre-ram;
	status = "okay";
};

&usb3_dwc3 {
	bootph-pre-ram;
	dr_mode = "otg";
	hnp-disable;
	srp-disable;
	adp-disable;
	usb-role-switch;
	role-switch-default-mode = "peripheral";
	snps,dis-u1-entry-quirk;
	snps,dis-u2-entry-quirk;
	status = "okay";
};

&usb3_phy {
	bootph-pre-ram;
	orientation-switch;
	status = "okay";
};

&usdhc1 {
	bootph-pre-ram;
};

&usdhc2 {
	bootph-pre-ram;
};

&wdog3 {
	status = "disabled";
};

&scmi_iomuxc {
	pinctrl_emdio: emdiogrp {
		fsl,pins = <
			IMX94_PAD_ETH4_MDC_GPIO1__NETC_EMDC		0x57e
			IMX94_PAD_ETH4_MDIO_GPIO2__NETC_EMDIO		0x97e
		>;
	};

	pinctrl_eth3: eth3grp {
		fsl,pins = <
			IMX94_PAD_ETH3_TXD3__NETC_PINMUX_ETH3_TXD3		0x57e
			IMX94_PAD_ETH3_TXD2__NETC_PINMUX_ETH3_TXD2		0x57e
			IMX94_PAD_ETH3_TXD1__NETC_PINMUX_ETH3_TXD1		0x57e
			IMX94_PAD_ETH3_TXD0__NETC_PINMUX_ETH3_TXD0		0x57e
			IMX94_PAD_ETH3_TX_CTL__NETC_PINMUX_ETH3_TX_CTL		0x57e
			IMX94_PAD_ETH3_TX_CLK__NETC_PINMUX_ETH3_TX_CLK		0x5fe
			IMX94_PAD_ETH3_RX_CTL__NETC_PINMUX_ETH3_RX_CTL		0x57e
			IMX94_PAD_ETH3_RX_CLK__NETC_PINMUX_ETH3_RX_CLK		0x5fe
			IMX94_PAD_ETH3_RXD0__NETC_PINMUX_ETH3_RXD0		0x57e
			IMX94_PAD_ETH3_RXD1__NETC_PINMUX_ETH3_RXD1		0x57e
			IMX94_PAD_ETH3_RXD2__NETC_PINMUX_ETH3_RXD2		0x57e
			IMX94_PAD_ETH3_RXD3__NETC_PINMUX_ETH3_RXD3		0x57e
		>;
	};

	pinctrl_eth4: eth4grp {
		fsl,pins = <
			IMX94_PAD_ETH4_TXD3__NETC_PINMUX_ETH4_TXD3		0x57e
			IMX94_PAD_ETH4_TXD2__NETC_PINMUX_ETH4_TXD2		0x57e
			IMX94_PAD_ETH4_TXD1__NETC_PINMUX_ETH4_TXD1		0x57e
			IMX94_PAD_ETH4_TXD0__NETC_PINMUX_ETH4_TXD0		0x57e
			IMX94_PAD_ETH4_TX_CTL__NETC_PINMUX_ETH4_TX_CTL		0x57e
			IMX94_PAD_ETH4_TX_CLK__NETC_PINMUX_ETH4_TX_CLK		0x5fe
			IMX94_PAD_ETH4_RX_CTL__NETC_PINMUX_ETH4_RX_CTL		0x57e
			IMX94_PAD_ETH4_RX_CLK__NETC_PINMUX_ETH4_RX_CLK		0x5fe
			IMX94_PAD_ETH4_RXD0__NETC_PINMUX_ETH4_RXD0		0x57e
			IMX94_PAD_ETH4_RXD1__NETC_PINMUX_ETH4_RXD1		0x57e
			IMX94_PAD_ETH4_RXD2__NETC_PINMUX_ETH4_RXD2		0x57e
			IMX94_PAD_ETH4_RXD3__NETC_PINMUX_ETH4_RXD3		0x57e
		>;
	};

	pinctrl_lpi2c3: lpi2c3grp {
		fsl,pins = <
			IMX94_PAD_GPIO_IO16__LPI2C3_SDA		0x40000b9e
			IMX94_PAD_GPIO_IO17__LPI2C3_SCL		0x40000b9e
		>;
	};
};

&pinctrl_reg_usdhc2_vmmc {
	bootph-pre-ram;
};

&pinctrl_uart1 {
	bootph-pre-ram;
};

&pinctrl_usdhc1 {
	bootph-pre-ram;
};

&pinctrl_usdhc1_100mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc1_200mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc2 {
	bootph-pre-ram;
};

&pinctrl_usdhc2_100mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc2_200mhz {
	bootph-pre-ram;
};

&pinctrl_usdhc2_gpio {
	bootph-pre-ram;
};
