if ARCH_STM32MP

config SPL
	select SPL_BOARD_INIT
	select SPL_CLK
	select SPL_DM
	select SPL_DM_SEQ_ALIAS
	select SPL_DRIVERS_MISC
	select SPL_FRAMEWORK
	select SPL_GPIO
	select SPL_LIBCOMMON_SUPPORT
	select SPL_LIBGENERIC_SUPPORT
	select SPL_OF_CONTROL
	select SPL_OF_TRANSLATE
	select SPL_PINCTRL
	select SPL_REGMAP
	select SPL_DM_RESET
	select SPL_SERIAL
	select SPL_SYSCON
	select SPL_WATCHDOG if WATCHDOG
	imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
	imply SPL_BOOTSTAGE if BOOTSTAGE
	imply SPL_DISPLAY_PRINT
	imply SPL_LIBDISK_SUPPORT
	imply SPL_SPI_LOAD if SPL_SPI

config SYS_SOC
	default "stm32mp"

config SYS_MALLOC_LEN
	default 0x2000000

config ENV_SIZE
	default 0x2000

choice
	prompt "Select STMicroelectronics STM32MPxxx Soc"
	default STM32MP15X

config STM32MP13X
	bool "Support STMicroelectronics STM32MP13x Soc"
	select ARCH_EARLY_INIT_R
	select ARM_SMCCC if TFABOOT
	select ARCH_SUPPORT_PSCI if !TFABOOT
	select BINMAN if !TFABOOT
	select CPU_V7A
	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
	select OF_BOARD if TFABOOT
	select OF_BOARD_SETUP
	select PINCTRL_STM32
	select STM32_RCC
	select STM32_RESET
	select STM32_SERIAL
	select SUPPORT_SPL if !TFABOOT
	select SYS_ARCH_TIMER
	imply CMD_NVEDIT_INFO
	imply OF_UPSTREAM
	help
		support of STMicroelectronics SOC STM32MP13x family
		STMicroelectronics MPU with core ARMv7

config STM32MP15X
	bool "Support STMicroelectronics STM32MP15x Soc"
	select ARCH_EARLY_INIT_R
	select ARCH_SUPPORT_PSCI
	select BINMAN
	select CPU_V7A
	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
	select OF_BOARD if TFABOOT
	select OF_BOARD_SETUP
	select PINCTRL_STM32
	select STM32_RCC
	select STM32_RESET
	select STM32_SERIAL
	select SUPPORT_SPL
	select SYS_ARCH_TIMER
	imply CMD_NVEDIT_INFO
	imply OF_UPSTREAM
	help
		support of STMicroelectronics SOC STM32MP15x family
		STM32MP157, STM32MP153 or STM32MP151
		STMicroelectronics MPU with core ARMv7
		dual core A7 for STM32MP157/3, monocore for STM32MP151

config STM32MP23X
	bool "Support STMicroelectronics STM32MP23x Soc"
	select ARM64
	select CLK_STM32MP25
	select OF_BOARD
	select PINCTRL_STM32
	select STM32_RCC
	select STM32_RESET
	select STM32_SERIAL
	select STM32MP_TAMP_NVMEM
	select SYS_ARCH_TIMER
	select TFABOOT
	imply CLK_SCMI
	imply CMD_NVEDIT_INFO
	imply DM_REGULATOR
	imply DM_REGULATOR_SCMI
	imply OF_UPSTREAM
	imply OPTEE
	imply RESET_SCMI
	imply SYSRESET_PSCI
	imply TEE
	imply VERSION_VARIABLE
	help
		Support of STMicroelectronics SOC STM32MP23x family
		STMicroelectronics MPU with 2 * A53 core and 1 M33 core

config STM32MP25X
	bool "Support STMicroelectronics STM32MP25x Soc"
	select ARM64
	select CLK_STM32MP25
	select OF_BOARD
	select PINCTRL_STM32
	select STM32_RCC
	select STM32_RESET
	select STM32_SERIAL
	select SYS_ARCH_TIMER
	select TFABOOT
	imply CLK_SCMI
	imply CMD_NVEDIT_INFO
	imply DM_REGULATOR
	imply DM_REGULATOR_SCMI
	imply OF_UPSTREAM
	imply OPTEE
	imply RESET_SCMI
	imply SYSRESET_PSCI
	imply TEE
	imply VERSION_VARIABLE
	help
		Support of STMicroelectronics SOC STM32MP25x family
		STMicroelectronics MPU with 2 * A53 core and 1 M33 core
endchoice

config NR_DRAM_BANKS
	default 1

config DDR_CACHEABLE_SIZE
	hex "Size of the DDR marked cacheable in pre-reloc stage"
	default 0x40000000
	help
		Define the size of the DDR marked as cacheable in U-Boot
		pre-reloc stage.
		This option can be useful to avoid speculatif access
		to secured area of DDR used by TF-A or OP-TEE before U-Boot
		initialization.
		The areas marked "no-map" in device tree should be located
		before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.

config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
	hex "Partition on MMC2 to use to load U-Boot from"
	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
	default 1
	help
	  Partition on the second MMC to load U-Boot from when the MMC is being
	  used in raw mode

config STM32_ECDSA_VERIFY
	bool "STM32 ECDSA verification via the ROM API"
	depends on SPL_ECDSA_VERIFY
	default y
	help
	  Say y to enable the uclass driver for ECDSA verification using the
	  ROM API provided on STM32MP.
	  The ROM API is only available during SPL for now.

config STM32MP_TAMP_NVMEM
	bool "STM32 TAMP backup registers via NVMEM API"
	select NVMEM
	default y
	help
	  Say y to enable the uclass driver for TAMP Backup registers using the
	  NVMEM API. It allows to access to boot mode or others shared information
	  between software components/execution levels.

config CMD_STM32KEY
	bool "command stm32key to fuse public key hash"
	depends on CMDLINE
	help
		fuse public key hash in corresponding fuse used to authenticate
		binary.
		This command is used to evaluate the secure boot on stm32mp SOC,
		it is deactivated by default in real products.

config MFD_STM32_TIMERS
	bool "STM32 multifonction timer support"
	help
	  Select this to enable support for the multifunction timer found on
	  STM32 devices.

source "arch/arm/mach-stm32mp/Kconfig.13x"
source "arch/arm/mach-stm32mp/Kconfig.15x"
source "arch/arm/mach-stm32mp/Kconfig.23x"
source "arch/arm/mach-stm32mp/Kconfig.25x"
source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"

config STM32MP15_PWR
	bool "Enable driver for STM32MP15x PWR"
	depends on DM_REGULATOR && DM_PMIC && (STM32MP13X || STM32MP15X)
	default y if STM32MP15X
	help
		This config enables implementation of driver-model pmic and
		regulator uclass features for access to STM32MP15x PWR.

config SPL_STM32MP15_PWR
	bool "Enable driver for STM32MP15x PWR in SPL"
	depends on SPL && SPL_DM_REGULATOR && SPL_DM_PMIC && (STM32MP13X || STM32MP15X)
	default y if STM32MP15X
	help
		This config enables implementation of driver-model pmic and
		regulator uclass features for access to STM32MP15x PWR in SPL.

endif
