// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the Ironhide board
 *
 * Copyright (C) 2025 Renesas Electronics Corp.
 */

/dts-v1/;
#include "r8a78000.dtsi"
#include <dt-bindings/net/ti-dp83869.h>

/ {
	model = "Renesas Ironhide board based on r8a78000";
	compatible = "renesas,ironhide", "renesas,r8a78000";

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		i2c8 = &i2c8;
		mmc0 = &mmc0;
		serial0 = &hscif0;
	};

	chosen {
		stdout-path = "serial0:1843200n8";
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x0 0x40000000 0x0 0x80000000>;
	};

	memory@1080000000 {
		device_type = "memory";
		reg = <0x10 0x80000000 0x0 0x80000000>;
	};

	memory@1200000000 {
		device_type = "memory";
		reg = <0x12 0x00000000 0x1 0x00000000>;
	};

	memory@1400000000 {
		device_type = "memory";
		reg = <0x14 0x00000000 0x1 0x00000000>;
	};

	memory@1600000000 {
		device_type = "memory";
		reg = <0x16 0x00000000 0x1 0x00000000>;
	};

	memory@1800000000 {
		device_type = "memory";
		reg = <0x18 0x00000000 0x1 0x00000000>;
	};

	memory@1a00000000 {
		device_type = "memory";
		reg = <0x1a 0x00000000 0x1 0x00000000>;
	};

	memory@1c00000000 {
		device_type = "memory";
		reg = <0x1c 0x00000000 0x1 0x00000000>;
	};

	memory@1e00000000 {
		device_type = "memory";
		reg = <0x1e 0x00000000 0x1 0x00000000>;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&extal_clk {
	clock-frequency = <16666600>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&hscif0 {
	pinctrl-0 = <&hscif0_pins>;
	pinctrl-names = "default";
	uart-has-rtscts;
	status = "okay";
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";

	eeprom@50 {
		compatible = "rohm,br24g01", "atmel,24c01";
		reg = <0x50>;
		pagesize = <8>;
	};
};

&i2c1 {
	pinctrl-0 = <&i2c1_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;
	status = "okay";
};

&eth_pcs {
	phys = <&mp_phy 2 1>;
	status = "okay";
};

&mmc0 {
	pinctrl-0 = <&mmc0_pins>;
	pinctrl-1 = <&mmc0_pins>;
	pinctrl-names = "default", "state_uhs";

	bus-width = <8>;
	full-pwr-cycle-in-suspend;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	no-sd;
	no-sdio;
	non-removable;

	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;

	status = "okay";
};

&ufs0 {
	status = "okay";
};

&ufs1 {
	status = "okay";
};

&mp_phy {
	status = "okay";
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	eth25g2_pins: eth25g2 {
		groups = "eth25g2_mdio", "eth25g2_link", "eth25g2_phyint";
		function = "eth25g2";
		drive-strength = <24>;
	};

	ethes0_pins: ethes0 {
		groups = "ethes0_match", "ethes0_capture", "ethes0_pps";
		function = "ethes0";
		drive-strength = <24>;
	};

	hscif0_pins: hscif0 {
		groups = "hscif0_data", "hscif0_ctrl";
		function = "hscif0";
	};

	i2c0_pins: i2c0 {
		groups = "i2c0";
		function = "i2c0";
	};

	i2c1_pins: i2c1 {
		groups = "i2c1";
		function = "i2c1";
	};

	mmc0_pins: mmc0 {
		groups = "mmc0_data8", "mmc0_ctrl", "mmc0_ds";
		function = "mmc0";
		drive-strength = <24>;
	};

	rsw3_pins: rsw3 {
		groups = "rsw3_match", "rsw3_capture", "rsw3_pps";
		function = "rsw3";
		drive-strength = <24>;
	};

	scif_clk_pins: scif-clk {
		groups = "scif_clk";
		function = "scif_clk";
	};
};

&rswitch3 {
	pinctrl-0 = <&rsw3_pins>, <&eth25g2_pins>, <&ethes0_pins>;
	pinctrl-names = "default";
	status = "okay";

	ethernet-ports {
		#address-cells = <1>;
		#size-cells = <0>;

		/*
		 * NOTE: Only port@4 is configured for R-Car X5H board.
		 * Other ports (0-3, 5-12) are currently unused or not
		 * connected.
		 */
		port@4 {
			reg = <4>;
			renesas,connect_to_xpcs;
			phy-handle = <&dp83869_phy>;
			phy-mode = "sgmii";
			phys = <&eth_pcs 5>;

			mdio {
				#address-cells = <1>;
				#size-cells = <0>;

				dp83869_phy: ethernet-phy@2 {
					reg = <2>;
					ti,sgmii-interface;
					ti,max-output-impedance;
					ti,refclk-output-enable;
					ti,clk-output-sel = <DP83869_CLK_O_SEL_REF_CLK>;
				};
			};
		};
	};
};

&scif_clk {
	clock-frequency = <26000000>;
};
